LEDs convert electrical energy into optical energy. In semiconductor LEDs, light is usually generated through recombination of electrons, originating from a first doped semiconductor layer, and holes, originating from a second doped semiconductor layer. In some infra-red emitting semiconductor materials light can be generated by electron intersub-band transitions rather than electron-hole transitions. The area where the main light generation takes place is referred to herein as the active layer, or more generally as the active region.
A major challenge in the field of LEDs is to extract as much of the emitted light as possible from the semiconductor material into the surrounding medium, which may be air.
There are a number of problems with traditional cuboid-shaped LEDs including: 1) most light emitted from the active layer is outside the angle of total internal reflection, which leads to long path lengths for rays; and 2) they suffer from high absorption due to increased path lengths
An approach used to improve LED performance is called chip shaping. Higher EEs are possible with this approach. However, it does not eliminate the long path lengths within the LED chip, nor the requirement for an external mirror. Also, the technique is less suitable to the widely used gallium nitride (GaN) based LEDs. The reason for this is that the sapphire and silicon carbide (SiC) substrates commonly used in GaN-based LED chips are very hard materials and are very difficult to shape mechanically, for example, with a dicing saw. In LEDs comprising these materials, it seems not to be a practical solution to shape the whole chip.
Another approach to achieving a high EE is to provide an array of “micro-LEDs”, thus keeping the average path length within the device short. Such arrangements are described in U.S. Pat. No. 6,410,940 and U.S. Pat. No. 6,410,942.
Total internal reflection is a common problem for LED devices, as the refractive index of the substrate materials used is typically much greater than air, which typically surrounds the LED. This allows light to escape from only a very narrow range of escape angles (or critical angle range) around the normal to the exit surface. The escape angle is more limited as the difference in refractive index of the materials becomes larger. For typical LED devices, in the simplest case, only approximately 10% of the generated light is extracted. The design challenge is to create a structure which allows more light to be extracted into the air.
Packaging techniques may also be used to enhance the EE of LEDs. For example, the extraction efficiency can be increased by profiling an encapsulant over a packaged semiconductor LED device. The encapsulant may be epoxy or phosphor crudely shaped like a lens. This can improve the EE by around 5 to 10%. Additional 90° lenses placed on a packaged LED device can be used to improve the EE of the device by around 10 to 20%.
Processing approaches that user planar fabrication techniques are preferred by the LED industry as they are compatible high volume manufacturing. Any modification to an LED design should use such techniques.
Surface roughening of the semiconductor surface still maintains a planar concept, and these designs are still considered to be ‘planar’ in nature. Optimised surface roughening can currently achieve over 50% EE. However, there are limitations to this planar surface roughening approach. Firstly, the design still results in multiple internal reflections before the light escapes. This results in losses, especially reflections on the contact electrodes, even if the reflections are relatively efficient. Secondly, the design typically includes mirrors as part of the electrical contact on the planar surface to enhance the light extraction. This requires additional manufacturing processes.
Sapphire-based semiconductor devices (i.e. a Sapphire substrate) form the basis for the production of the majority of high production volumes and lower power devices. For the larger and higher power devices, the design requirements mean the material properties of the sapphire substrate become more limiting. Thicker substrates are advantageous to allow more light to escape from the sidewalls of the device. Sapphire has a poor thermal conductivity, so the device becomes hotter as the substrate becomes thicker. In terms of thermal management, the limitations of the sapphire substrate can be overcome by removing the semiconductor layer from the sapphire substrate and bonding to another thermally and electrically conducting substrate—a process known as wafer-lift off. This can provide a good thermal management solution. A mirror on the bonding interface is typically employed to improve the light extraction efficiency especially when combined with surface roughening on the exit surface.
In some cases an additional bonded substrate can be fabricated at angles other than 90° such that the reflections on these angled surfaces enhances the light extraction. This can enable an EE of up to around 65%.
A micro-LED structure is proposed in WO 2004/097947 (U.S. Pat. No. 7,518,149) with a high EE because of its shape. Such a micro-LED 100 is shown in FIG. 1, wherein a substrate 102 has a semiconductor epitaxial layer 104 located on it. The epitaxial layer 104 is shaped into a mesa 106. An active (or light emitting) layer 108 is enclosed in the mesa structure 106. The mesa 106 has a truncated top, on a side opposed to a light transmitting or emitting face 110. The mesa 106 also has a near-parabolic shape to form a reflective enclosure for light generated or detected within the device. The arrows 112 show how light emitted from the active layer 108 is reflected off the walls of the mesa 106 toward the light exiting surface 110 at an angle sufficient for it to escape the LED device 100 (i.e. within the angle of total internal reflection).